(China (Mainland))
Product Summary
The CY7C1041DV33-10ZSXI is a high performance CMOS Static RAM organized as 256 K words by 16-bits. To write to the CY7C1041DV33-10ZSXI, take chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins (I/O0 to I/O7) is written into the location specified on the address pins (A0 to A17). If byte high enable (BHE) is LOW, then data from I/O pins (I/O8 to I/O15) is written into the location specified on the address pins(A0 to A17). The CY7C1041DV33-10ZSXI is available in a standard 44-pin 400-mil wide SOJ and 44-pin TSOP II package with center power and ground (revolutionary) pinout and a 48-ball FBGA package.
Parametrics
CY7C1041DV33-10ZSXI features: (1)Temperature ranges Industrial: –40 ℃ to 85 ℃; (2)Pin and function compatible with CY7C1041CV33; (3)High speed tAA = 10 ns; (4)Low active power ICC = 90 mA; (5)Low CMOS standby power ISB2 = 10 mA; (6)2.0 V data retention; (7)Automatic power-down when deselected; (8)TTL compatible inputs and outputs; (9)Easy memory expansion with CE and OE features; (10)Available in Pb-free 48-ball VFBGA, 44-pin (400-mil) molded SOJ, and 44-pin TSOP II Packages.
Features
CY7C1041DV33-10ZSXI absolute maximum ratings: (1)Storage temperature: 65 ℃ to +150 ℃; (2)Ambient temperature with power applied: 55 ℃ to +125 ℃; (3)Supply voltage on VCC relative to GND: 0.3 V to +4.6 V; (4)DC voltage applied to outputs in high Z State: 0.3 V to VCC +0.3 V; (5)DC input voltage: –0.3 V to VCC + 0.3 V; (6)Current into outputs (LOW): 20 mA; (7)Static discharge voltage: > 2001 V(MIL-STD-883, method 3015); (8)Latch-up current: > 200 mA.
Diagrams
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 CY7C1041DV33-10ZSXI |
Cypress Semiconductor |
SRAM 4M FAST ASYNC HI SPD IND |
Data Sheet |
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CY7C1041DV33-10ZSXIT |
Cypress Semiconductor |
SRAM 4M FAST ASYNC HI SPD IND |
Data Sheet |
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